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DDR4 Series Manual Addendum
This manual addendum describes the operation of the RAMCHECK LX DDR4 Series Adapter (p/n INN-8686-18). This adapter will work ONLY with the RAMCHECK LX (p/n INN-8686) base tester. If you own the older RAMCHECK (p/n INN-8668) base tester it can be converted to the RAMCHECK LX level.
The DDR4 Series Adapter features user-replaceable test heads, for different module types. The test head is mounted on the DDR4 Series Adapter using the two top sockets as shown in the following picture.
To test 288-pin DIMMs, you can use the currently available 288-pin DIMM Test Head, p/n INN-8686-18-1. A complimentary 288-pin DIMM Test Head is included with each order of the DDR4 Series Adapter (p/n INN-8686-18).
The 288-pin DIMM test head uses a low-cost quality production socket that enable us to introduce the DDR4 Series at an affordable price. The test head uses a press-fit 288-pin socket that is not soldered in. Worn-out sockets can be replaced at the factory. Please review the following page to learn how the socket replacement work as well as tips to increase the life of the socket.
For high volume testing we recommend using the 288-pin DIMM PRO test head, p/n INN-8686-18-8. This test head is included in the DDR4 Series Adapter Pro configuration (p/n INN-8686-18-PRO).
A 260-pin DDR4 SODIMM (p/n INN-8686-18-8) test head is also available.
We are developing the following additional test heads:
You must have RAMCHECK LX firmware version 3.46 (or higher) to support the DDR4 adapter. You can download the current firmware here. You also need to have the RAMCHECK LX PC Communications Software version 3.12 or higher.
| CAUTION: AVOID COSTLY ESD DAMAGE DDR4 modules and the DDR4 Series adapter itself are susceptible to electrostatic discharge (ESD). We strongly advise that you practice standard ESD safety while testing DDR4 modules on the RAMCHECK LX to prevent damage, including the use of an anti-static wrist strap and anti-static mat at your workstation. |
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The small open IDC printer connector at the right side of the RAMCHECK LX tester has one of
its pins connected to ground. It might be a good practice to gently touch the center of the open connector
(as shown in the picture above) prior
to handling the DDR4 modules to further dissipate charges from the hand. Of course, this practice should not be in lieu of using the anti-static wrist band. The wire coming from the anti-static wrist band should be properly connected to a ground point on your test bench (do not connect it to any part of the RAMCHECK LX itself!) For more information please consult our tech support department. |
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The test head is mounted on the DDR4 series adapter by using two 130-pin sockets. To install the test head, carefully press gradually at both sides. To remove the test head, carefully pull the test head using two hands holding on both sides of the 130-pin sockets. The sockets are key-locked so that you cannot connect the test head in reverse.
You can connect and remove the test head from the DDR4 series adapter when the adapter is not mounted on RAMCHECK LX. You can also replace the test head while the adapter is mounted on the RAMCHECK LX, provided that RAMCHECK LX is turned off.
The DDR4 series adapter connects to RAMCHECK LX via the two top 90-pin and 50-pin expansion slots. Turn the RAMCHECK LX OFF and carefully mount the DDR4 series adapter onto the RAMCHECK LX expansion slots, while pressing it gradually on both sides. To test other devices with optional adapters you must turn RAMCHECK LX OFF and remove the DDR4 adapter by gradually pulling it up on both sides. Take care not to flex the adapter's boards.
CAUTION: Plug this adapter into the expansion slots only when RAMCHECK LX is OFF! Failure to turn RAMCHECK LX OFF when connecting or disconnecting the DDR4 series adapter or its test head may result in damage to the internal chips of both the RAMCHECK LX and/or the DDR4 series adapter!
CAUTION: Please let the adapter COOL DOWN for at least 1 minute before attempting to remove it from RAMCHECK LX. Removal of the adapter while it is still hot may impair some of the soldered connections of its delicate internal parts!
RAMCHECK LX automatically recognizes the presence of the DDR4 Series Adapter with the following initial turn-on screen:
This screen is then changed to indicate which test head you are using. The following screen shots illustrate the use of the 288-pin DIMM (left) and the 288-pin DIMM PRO (right).
We recommend the sockets remain empty while you turn on the RAMCHECK LX as the system is performing a quick self-test.
The test heads for the DDR4 Series Adapter support the 288-pin DDR4 DIMM modules. We are developing optional test heads for 288-pin MiniDIMMs.
INSERTION: The 288-pin DIMM test head uses a vertically mounted test socket with two ejectors that need to be opened prior to insertion. Carefully insert the DDR4 DIMM into the socket, pushing it evenly along its top. Pin 1 of the module should point to the left side (as marked on the test head), so that the key area of the module's connector is correctly aligned with the key area in the test socket. When the DIMM is properly inserted, the ejectors will snap onto the half circle notches on each side of the module.
REMOVAL: The DIMM is easily released from the socket by pulling both ejectors sideways.
CAUTION: DIMM insertion and removal should be done only when RAMCHECK LX is in STANDBY Mode. The RED "Module Power" LED should be OFF in STANDBY mode.
Turn RAMCHECK LX on once the DDR4 Series Adapter is installed. There is no need for special setup with RAMCHECK LX since it automatically recognizes the DDR4 adapter. When RAMCHECK LX enters the STANDBY mode, the display will prompt you to test DDR4 modules. Insert the DIMM module.
The DDR4 test procedure is initiated by pressing the F1 key and is designed to follow the regular RAMCHECK LX test flows. Unless you press the ESC key, EXTENSIVE TEST follows BASIC TEST, and AUTO-LOOP follows EXTENSIVE TEST. Setup is accessed via F2 and you can view the Test Log of your last module test by pressing F4.
When set to the default Automatic Mode, RAMCHECK LX automatically detects the module structure without the need of any special setup. The Basic Test starts when you press F1.
At the start of BASIC TEST, RAMCHECK LX provides power and proper initialization sequence (involving control and clock lines) to the DDR4 module. A large variety of quick wiring tests are conducted, the module structure and frequency are determined, and the module is prepared for the memory array test. Since the wiring and structure tests are extremely fast, their results are logged in the Test Log and reported after the end of BASIC TEST, unless an error is encountered. Wiring error examples will be discussed below.
The main phase of the BASIC TEST is the memory array test where RAMCHECK LX scans the entire memory array with several patterns. During these tests, which consume most of the time of the BASIC TEST phase, the tester reports various parameters as shown in the following examples:
The BYTES line animates the progress of the array test along the module bytes. The test is conducted in parallel on all bytes. ECC modules (x72) use 9 bytes (B1-B9) while the NON-ECC (x64) modules use 8 bytes to show the test progress. The next line starts with a test length timer and is followed with a parameter display. The parameter display changes during the BASIC TEST. The parameter display in the left screen shows the test voltage (1.20V). The parameter display in the second screen show the the module structure (2Rx4), and the adapter test frequency (1600MHz) in the right screen. The bottom line displays the Manufacturer's Rating, which is the official speed rating of the module as determined by the module's manufacturer.
The timer line also includes the "REG" or "UBF" marker to indicate the module type, Registered or Unbuffered, respectively. The final marker on this line is a small graphic symbol depicting the 1.2 volt used for DDR4.
The next line starts with the module size (size is also shown in the equivalent GB format in the Test Log and in the test summary that follows Basic Test). The actual test voltage and the memory mode (DDR4 in this case) share the immediate place after the size. Then follows the CAS Latency (CL) information. The size line ends with the "bank under test" marker Bx/x" that will be explained in more detail later in this section. The "PATT:" line shows the first 8 hexadecimal digits of the current pattern that scans the memory module.
So far we can see that the module tested in the screens above is a 2Gx72 ECC Registered module rated at 2133MHz CAS Latency CL=11 and 2Rx4 structure. The current test shown in the screen uses the pattern 55555555 to test various banks of module.
RANKS and BANKS Terminology: Historically, earlier memory modules were divided into banks of individual memory devices (memory chips) that span the entire bit width of the module. With the advance of SDRAM and DDR technologies, individual memory devices were incorporating internal banks, causing a confusion between internal bank and a module bank. As a result, JEDEC adapted the term RANK to refer to a group of 64 or 72 bit memory devices controlled by a single select line -S0, -S1, -S2 or -S3. The term BANK was restricted to the internal bank of each individual memory chip, which is selected by bank address lines. For DDR4, bank address lines are divided into two bank address lines BA1 and BA0, and one or two bank group lines, BG1 and BG0.
3DS DIE Terminology: DDR4 incorporates the 3DS memory chip technology that allows mounting multiple memory dies (a die is a piece of silicon having, in this case, a full memory array and interface) on a single IC chip. 3DS creates on the single IC chip a single load stack, so that all the dies mounted on the chip are exhibiting only a single load to each of the interface command and address lines. As a result, the chip is controlled by a single select line (-S0 or S1). Up to three control line, C0, C1 and C2, select which individual die is accessed when the single select line is active.
The 3DS technology is different than the multi load stack technology where a Dual Die chip must use two select lines and produce double loading on all other command and address lines. Similarly, the multi load QuadDie chip uses four select lines and even larger overall loading. The reduced loading of the 3DS technology enable the efficient packing of very large size DDR4 modules. 3DS are commonly used in Load Reduced DIMMs and Registered DIMMs. Multi load stack technology is commonly used in Load Reduced DIMMs. DDR4 modules with 3DS usually has one or two main ranks, which are defined as "physical ranks" by JEDEC. Each physical rank is selected by a single -S0 or -S1 control line. The number of dies determines how many logical ranks are available on the module. Each logical rank is accessed by the C0,C1,C2 control lines mentioned above.
RAMCHECK LX automatically recognizes the presence of 3DS technology within the tested DDR4 module as appears in the following test log screen:
In this example of a 128GB LRDIMM module with 3DS chips, there are 4 dies on each chip, each die has a memory size of 16x256Mx4, for a total chip size of 8Gx4. DDR4 modules with 3DS usually have one or two ranks. In this example the module has two ranks and its JEDEC structure is "2S4Rx4". The 2S4R means that there are two physical ranks, each with four logical ranks. Therefore, the module has a total of 8 logical ranks.
LRDIMM with Dual Die Chips: Since the Dual Die memory chips require two select controls for each chip, they are used in LRDIMM modules that support four select controls lines -S0, -S1, -S2, -S3. Structure of modules with Dual Die chips use the JEDEC marking of "4DRx4" as shown in the following screen:
Prior to the 3DS technology, the RAMCHECK LX's "bank under test" marker uses the form "Bx/x" at the right corner of the screen, and it is updated during the test. For example, in the "4DRx4" LRDIMM module test shown above, the "B4/7" marker indicates that the current bank under test is in the fourth physical rank (controlled by the -S3 select line), and it is bank 7 (controlled by the bank select lines BG(1:0)='01' and BA(1:0)='11'). The four bank select lines, BG(1:0)+BA(1:0) can select up to 16 banks (bank0 to bank15). They are marked by a single Hexadecimal digit. Thus, "B3/D" marker selects the 14th bank ("D"=13, we start marking at 0) in the third physical rank.
3DS technology selects the bank under test with three numbers, to indicate the physical rank, the three die select lines C(2..0), and the four bank select lines BG(1:0)+BA(1:0). The marker for 3DS uses the "Bxxx" notation - the first digit of is the physical rank and can be 1 or 2. The second number is the die select lines C(2:0), and the last number is the hexadecimal digit for the four bank select lines. The following screens illustrates two examples:
The first example, "B122" indicates that the bank under test is in physical rank 1 (controlled by -S0), the die select lines C(2:0)='0010' in binary notation=2, and the banks select lines BG(1:0)+BA(1:0)='0010'=2. The second example, "B22A" indicates that the bank under test is in physical rank 2 (controlled by -S1), the die select lines C(2:0)='0010'=2, and the banks select lines BG(1:0)+BA(1:0)='1010'='A'.
The user can setup test parameters either permanently via the Setup feature or just for the current test using the Change-on-the-fly that will be described below. Here we demonstrate two Basic Test screens with user setup. The left screen shows a module that was set arbitrarily at CL=13. The right screen shows a module that was set for high 1.24V testing.
Memory manufacturers must use very expensive advanced memory testers (like the one illustrated here) in order to fully certify the actual speed of the memory devices in accordance with the latest JEDEC DDR standards. These standards specify a large number of timing and current parameters that each memory chip needs to comply with in order to be properly specified with a speed rating. Obviously, RAMCHECK LX is a much smaller portable tester that is intended to be a fully functional tester, but not a parametric certifying tester. Therefore, RAMCHECK LX prominently displays the official speed rating as marked by the module manufacturer.
The Manufacturer's Speed Rating is displayed on the bottom line of various RAMCHECK LX screens using two common formats. The first screen above demonstrates a direct frequency marking like 2400MHz. The second screen demonstrates the equivalent JEDEC PC4-xxx marking of an 2400MHz rating (which is PC4-19200 for 2400MHz).
The DDR4 series adapter automatically changes the test frequency during the test based on timing optimizations that are required by the the adapter's various different test algorithms and data loading circuitry. For example, the first screen above shows a test frequency of 1600MHz. Please use the Manufacturer's Speed Rating illustrated above as the official actual speed of the tested module, even if RAMCHECK LX tests it at a lower frequency. Please see the product specifications for futher details.
If the Basic Test finishes without an error, you will see the Basic Test results. There is a lot of information after each test, and RAMCHECK LX automatically keeps all the information in the Test Log until you perform the next test. The following sections discuss the test results, the test log, error messages, and the Change-on-the-fly/Setup features.
The following screen shows the first summary screen following a successful Basic Test with a DDR4 module:
In this example, a DDR4 4GB module, organized as 2GBx72, was tested at 1600MHz. The module is Registered (see the "REG" label on third line), and it uses a single differential clock pairs.
RAMCHECK LX Basic Test provides several screens for test results. The first summary screen is very important as it provides you with the manufacturer's speed rating. In the following example, the module is rated for 2133MHz, therefore it is PC43-17000.
| IMPORTANT TIP: You can quickly check the speed information without running the entire Basic Test. Just press F1 to start Basic Test and then press F5. While the test will be incomplete as far as the memory array test goes, the manufacturer's rated speed information and other data structure information will be quickly available to you. |
The next test summary screen provides additional structure information. In the following example it indicates that the registered 2GBx72 module has two physical Ranks, controlled by -S0 and -S1. The module is made of DDR4 chips with a size of 16 banks by 128Mx4. The automatically selected CAS Latency was CL=11, and the test voltage remained at the default setting of 1.2V.
The RAMCHECK LX Test Log allows you to review all of the DDR4 test results in one continuous scrolling display. You can view the test even after the test ends (but before you start a new test) by pressing F3 from Standby and selecting Test Log with F1. The Test Log is one of RAMCHECK LX's most powerful features. When used with the PC Communications program, the test log can be printed and saved into convenient log files.
The following screens show you some of the new features of the DDR4 series adapter as seen in the Test Log. The first set of seven screens show the results of Basic Test.
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Please note that actual test results in your Test Log will differ in detail from one module to another. We are also adding more information as we expand the DDR4 Test Flow.
| IMPORTANT TIP: As long as you do not start a new test, the Test Log retains all the results of the last test. Any time you start a new Basic Test the test log is cleared. You can print and save your test logs with the PC Communications software, included with the RAMCHECK LX. |
At the start of the Basic Test, RAMCHECK LX performs a large number of wiring tests to verify that data lines, address lines and control lines are properly wired and function. Then the array tests and other tests continue to verify the module operation and once an error is encountered, the test stops and the error message is displayed. There are several different error reporters that generate the proper error messages.
Data Error Messages
The first one is the Data Bits Error.
The first screen above is the initial DATA BITS error message. It shows you (with Fs) which Rank the error occured (first rank in this case) and which bytes were affected. The second line show the actual offending bits in a two bytes section, B7-B8 in this case. B7-B8 list bits 48 to 63 which are marked on the two corners. The F near 48 means that the offending bit is DQ48. The three other F similarly translates to DQ50, DQ53 and DQ55.
The bottom line shows the size and adapter actual speed of the test section that found this error. If there were more byte errors in the bytes line, you can scroll using the left and right arrows. Use the down arrow to scroll into the second screen which lists the offending bits as DQ48, at pin 38. Continuing to press the down arrow will scroll the display as follows:
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You can scroll back and forth among the above screens using the up and down arrows. The information shown in the eight screens above are the linear address, Address decoded into Row and Column information, the 64 bit error E in hexadecimal notation, the parity bits error in CB, the calling function (Array test in this case) and the memory section B1/0 which is the first bank of the first rank.
If you continue to scroll down the error messages, you may come upon an encrypted message like the "BUS CODE=10000038" in the following screen:
This kind of message is not useful for the user, but when you send a test log for evaluation to our Tech Support Department it is quite useful for us to know the internal state of the RAMCHECK LX controller when the error was encountered. Customers often send us test logs of module failures to verify test compatibility issues as well as improve our testing algorithms.
Wiring Error Messages
Initial wiring problems are detected and reported in the following example screens:
The above screen shows DQS Differential Pair wiring errors. These control lines are crucial for the data line strobe activity, so that no memory activity can work without them. In this example DQS0 (and -DQS0, the other pair member) is stuck to ground. DQS0 pin number is also identified as pin 153. Use the left and right arrows to scroll the other DQS errors.
The above screen detected that ODT1 (pin 91) is stuck at 0.
The above screen shows address lines errors. It reports that address line A9 (pin 66) is shorted to ground.
The above screen shows data lines stuck at errors. It reports that data line D30 (pin 43) is shorted to VDD. The data lines error usually indicates static shorts for ground or VDD and they are different from the elaborated set of data errors discussed in the previous section. Those were detected by the full memory scan tests, while the data line stuck errors are detected by the initial wiring tests.
SPD Related Error Messages
The Serial Presence Detect (SPD) chip on each DDR4 module records a large set of parameters. If RAMCHECK LX finds a mismatch between the actual measured structure of the memory module and the recorded parameters within the SPD chip, it provides the following error:
Any such SPD errors make the module unusable in the modern motherboard, since the motherboard controller configures itself to access the memory modules solely based on the SPD data. This is why DDR4 modules use new SPD protection that requires relatively large voltage (10V) to change the SPD structure and speed data.
RAMCHECK LX provides a rich set of parameters that can be changed during the BASIC TEST. We distinguish the Change-On-The-Fly setup which affects ONLY the current test from the "permanent" setup which controls the test parameters, unless changed by the user. To reach the Setup menu, you press F2 during Standby mode. To activate the Change-On-The-Fly, you must first start BASIC TEST and then press F2.
Any change done via the Change-On-The-Fly menu is relevant during the current test. Permanent setup changes can be done via the regular Setup menu, which is activated by pressing F2 during STANDBY.
The DDR4 Series Adapter allows you to set up the read CAS LATENCY. Unlike DDR2, the DDR4 uses two programmable CAS latencies; the major one is for the read operation and the dependent one is CWL, the latency for the write operation. The program automatically changes the CWL to follow acceptable values based on the read CL setup.
In this example, the CAS LATENCY was fixed to CL=10 throughout the tests. The DDR3 CAS Latency can be set at 5,6,7,8,9,10,11, and 12. Please note that not all DDR3 modules support all CL values.
The DDR4 VDD Voltage setup allows the user to change on-the-fly the test voltage in the range 1.14V-1.26V. When set to AUTO, RAMCHECK LX automatically tests the module at 1.20V. In this example, the user is selecting a VDD of 1.24 Volt.
DDR4 PARAMETERS SETUPThe Change-on-the-fly feature allows you to change parameters for the current test only. Once the test finishes (that is, returns to STANDBY) any new tests use the default test parameters. You can permanently change test parameters using the RAMCHECK LX Setup Menu (and, of course, return to the default setup). You reach Setup by pressing F2 from Standby mode. Press F1 to select Parameter Setup. Setup parameter menus are similar to the Change-On-The-Fly menus discussed above.
The following screen shows how to setup 1.22V for DDR4 low voltage modules:
You can also setup CL, Rtt and more. To quickly return to the RAMCHECK LX default setup from STANDBY, please press F2 followed by F4.
NOTE: The DDR4 Series adapter has no frequency setup menu. The actual test frequency of the DDR4 Series adapter is selected automatically to 1600MHz and cannot be modified by the user. Please see the discussion above regarding the Manufacturer's official speed rating which is displayed in most screens during the test.
The EXTENSIVE TEST for DDR4 is similar to our DDR3 and DDR2 tests. Currently, the following test phases are performed (and more will be added soon):
During Voltage Cycling, the program cycles the
test voltage while running various DDR4 memory tests with different patterns,
as shown in the two screens above. The first screen shows a test at 1.23V while the
second screen shows a test at 1.14V.
The test can be skipped by pressing F1, or run again by pressing F2.
During Voltage Bounce for DDR4, bouncing is done between 1.14V to 1.26V, spanning
the recommended VDD range.
Data is written (or read) to the
module at the high end of VDD voltage (1.26V) and then read (or written) at a
the lower end of VDD voltage (e.g. 1.14V).
The test can be skipped by pressing F1, or run again by pressing F2.
During the Chip-Heat test, the RAMCHECK LX program uses proprietary techniques to increase the current consumption of the memory device, thus increasing the temperature prior to Final Test. The module is tested at the top recommended voltage for DDR4 (1.26V), while the program exercises all ranks of the module.
The Final Test during Extensive Test is very similar to Basic Test. Typically, at this stage, the module has been heated up during Extensive Test and the Chip Heat Mode. This test can be repeated by pressing F2.
Like Basic Test, successful Extensive Test concludes with a clear 'Pass' message and with distinguishing sound tones. Important parameters are shown in this screen.
TEST LOG
The Test Log lists the results of all the
phases of the Extensive Test.
In this screen, the Test Log completes the list of the results of all the phases of the Extensive Test.
The AUTO-LOOP test uses changing patterns to burn-in the module and to detect cell interferences. AUTO-LOOP continues until an error is detected or the user terminates the test by pressing the ESC key.
The AUTO-LOOP screen indicates the current loop number and the first data of the current complex pattern. Note that each complex pattern includes an 8x72 bit array, so that the "33CC33CC" hex marker is just the first 32 bits of the first 64/72 bit extended word.
The screen also shows the voltage, the CL setup and current portion of the module that is being tested ("B1/3" means chip's third bank of the first rank). Unless you have selected a specific CAS Latency (CL) value, the program may automatically change the CL setup every few loops. Similarly, unless you have set up a fixed voltage, the test voltages may change every few loops. You can skip loops using F1, cycle the voltage using F2, or cycle the CL setup using F5.
During AUTO-LOOP, the program automatically cools down the tested module every 16 loops, so that the module's operation is checked with a changing temperature gradient. Other functions like Self Refresh or CKE controlled power down mode are exercised during the cool down period. Notice that the Bank counter indicates B-/- during this Self Ref/ Cool Down phase.
You can exit the AUTO-LOOP test at any time by pressing the ESC button. You can also set up a loop number that will end the test automatically. Upon exiting the AUTO-LOOP test, RAMCHECK LX returns to STANDBY mode, and the TEST LOG records the exit loop number and the test time, as shown in the following screen.
The AUTO-LOOP feature has been enabled since Version 3.46 for RDIMM, UDIMM, and SODIMM DDR4 modules, and DDR4 LRDIMM modules. Please note that for DDR4 LRDIMM, Auto-Loop appears immediately after the BASIC TEST. We plan to add Extensive Test flow for LRDIMM modules in a new firmware version. For the Auto-Loop tests for LRDIMM modules, your DDR4 Adapter must have Engine #2 or higher (current production engine is #3). Please check the Product Info page in setup (F2 - setup, F5 - next , F3 - ProdInfo) to verify that your DDR4 adapter has the required engine. You will need to scroll down (F4) to see the DDR4 adapter's status. If your DDR4 adapter's engine needs an upgrade you will see the following screens. The left screen illustrates a DDR4 adapter with an up-to-date engine (either #2 or #3). The right screen illustrates a DDR4 adapter with the older engine #1 that must be upgraded.
Please contact our Technical Support department if an engine upgrade is needed. It is done at the factory, and we also add various other board improvements to match your adapter to the current production state.
INNOVENTIONS, Inc., reserves the right to change products or specifications without prior notice.
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