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Interpreting the RAMCHECK LX Test Log for DDR3 Devices

INN-8668-APN35
--Created 10-27-11

Each time you start the Basic Test, a test log is automatically generated. This information is automatically stored in the RAMCHECK LX's internal memory and remains in its memory until you run the test again or you turn the unit off. This application note focuses on the test log information recorded using the RAMCHECK LX's Auto Mode under firmware version 3.15. Please note: This also applies to the older RAMCHECK running firmware version 2.48 and above, the only difference being the RAMCHECK has a smaller LCD thus displaying fewer lines per screen.

The RAMCHECK LX test log can be seen in four different ways.
  1. The test log will be automatically displayed after the Basic test ends unless you press the "ESC" key to terminate the test.
  2. You can press "F5" anytime during the Basic Test to view the test log.
  3. The test log can be viewed at any time after you start the Basic test by pressing the "ESC" key after the Basic test is completed. Once in standby mode press "F4" then "F1" for "View Test Log", use "F4" to go forward through the screens and "F3" to go back. Once finished press the "ESC" key to go back to standby mode.
  4. By installing the RAMCHECK LX PC Communications program that was included with your RAMCHECK LX on your PC and connecting your RAMCHECK LX to your computer via the USB cable (included with the package), you can view, save or print out the complete test log for future reference.
The following screen shots were taken from the RAMCHECK LX using the DDR3 240-pin adapter, testing a PC3-10600 (1333MHz) 2G DDR3 unbuffered module using step 3 from above. Below is a breakdown of the test log by each individual screen shot and how to interpret the information.

BASIC TEST
The current test phase used by the RAMCHECK LX.
DDR3 DUT DETECTED - UBF

Describes the type of DUT (Device Under Test) that you are testing, in this case DDR3. "Type" is unbuffered, displayed as "UBF"
STRUCTURE TEST
Starts a brief test to determine the structure of the DDR3 module. All information that follows is the structure of the DDR3 device as detected by the RAMCHECK LX.
RANK BITS DETECTED:
RANK 1: CB DQ63 - 32 DQ31 - 0
00 FFFFFFFF FFFFFFFF

Gives you a brief description of the structure of the DDR3 device by mapping the DQ and CB (Parity) bits by the module's individual ranks. This feature is very useful in troubleshooting DDR3 modules with severe or multiple errors.
CONNECTOR WIRING - OK
At the start of the Basic Test the RAMCHECK LX performs a wiring test to verify that the Control lines are properly wired and functional. In this instance it reported no errors.
MODULE' s SPD ID:
0000: s/n=0
Displays the Module's Manufacturing Date in "Year - number of weeks" format and the serial number of the module that was read directly from the DDR3 module's Serial EEPROM (SPD).
DATA WIRING - PASS
DQS WIRING - PASS
ADD. WIRING - PASS

At the start of the Basic Test the RAMCHECK LX performs a wiring test to verify that the Data, DQS and Address lines are properly wired and functional. In this case it reported no errors.
TEST AT SSTL 1.5V
The DDR3 module is being tested at 1.5 volts.
SIZE: 256Mx64=2GB
Shows the size of the DDR3 module in both JEDEC notation and overall size.
CHIP SIZE: 8x32Mx8
=256Mx8

Shows the size of the individual DDR3 chips of the DDR3 module in both JEDEC notation and overall size.
15 ROW / 10 COL ADDR.
Shows the number of rows and columns detected by the RAMCHECK LX.
REFRESH:AUTO
Shows that the refresh rate is in Auto mode which will use the RAMCHECK LX's default value.
RANKS: 1
-S:0

Shows a brief description of the structure of the DDR3 module similar to the "RANKS BITS DETECTED" shown above, but by displaying the number of ranks and individual control lines that were detected by the RAMCHECK LX.
DQS:8..0 DM:8..0
Detects the use of either 8/9 pairs of DQS lines and 8/9 DM lines or only 18 pairs of DQS lines.
SPD=JEDEC
Conforms to JEDEC standards.
DDR3 240P DIMM
Shows the form factor of the DDR3 module, in this case a 240-pin DIMM.
TEST TABLE #28
CODE=1067

The "TEST TABLE" and "CODE" indications are used as part of our factory development to identify certain characteristics of the DDR3 device. These identifications can also be used as a form of comparison to other DDR3 devices.
TYPE: UNBUFFERED
The RAMCHECK LX detected the DDR3 module as conforming to the JEDEC standard for UNBUFFERED configurations. Other types may include REGISTERED, etc.
ECC=N
The RAMCHECK LX detected that this DDR3 module does not have (ECC) Error Correction Code wiring. If "ECC=Y" was displayed then ECC was detected.
CLOCKS:2 CK0 +1
The RAMCHECK LX detected the use of 2 clock input and displayed which clock input it detected.
BL TEST=4, 8 - OK
The RAMCHECK LX tested the operation of the 2 burst lengths available in DDR3 devices, 4 and 8. In this instance it indicates that BL (Burst Length) tested ok on both.
SPD=PC3-10600
Any time you see "SPD=" in the test log, it always refers to the information read directly from the Serial EEPROM (SPD) on the DDR3 module which is programmed by the module's manufacturer. In this case the SPD claims that this module is rated at PC3-10600.
ARRAY TEST @CL7
Ends the "STRUCTURE TEST" and starts the "ARRAY TEST @ CL7" where the entire memory array is written and verified twice at CL=7 to catch most cell stuck problems.
ARRAY TEST - OK
No errors were detected at CL7.
BT RETESTS: 0
The "BT RETEST" counter is design to catch transient or non-fatal errors that may occur randomly in memory. In this case no transient errors were found. This is a comparison tool that can be use by advanced users to compare between two or more modules. Please see Application Note 33 for further details.
SPEED TEST RESULT:
TEST=PC3-10600

The RAMCHECK LX determined that this DDR3 module is within PC3-10600 specifications.
FINAL SPEED:1066MHz
Final speed detected at the end of the Basic Test.
BASIC TEST OK
Shows that the DDR3 device passed the Basic Test.

TIME: 00:49.1
Displays the time it took to complete the Basic Test. In this case 00:49.1
EXTENSIVE TEST
The current test phase use by the RAMCHECK LX.
STRUCTURE TEST
Starts a brief test to determine the structure of the DDR3 module.
VOLTAGE CYCLING OK
SPEED: 1066MHz
TIME: 00:21.9

Shows that the DDR3 module passed Voltage Cycling at 1066 MHz and completed this test in 21.9 seconds. Voltage Cycling is a program that cycles the test voltage while running various DDR3 memory tests.
VOLTAGE BOUNCE OK
SPEED: 1066MHz

TIME: 01:00.5
Shows that the DDR3 module passed the Voltage Bounce at 1066 MHz and completed the test in 1 minute and 0.5 seconds from the start of the Extensive Test. During Voltage Bounce, data is written to the module at a certain voltage (e.g. 1.45V) and then read at a different voltage (e.g. 1.60V).
MARCH UP/DOWN OK
SPEED: 1066MHz
TIME: 01:20.0

Shows that the DDR3 module passed the March Up/Down at 1066 MHz and completed the test in 1 minute and 20 seconds from the start of the Extensive Test. During March Up/Down, the program attempts to catch cell interference errors
ARRAY TEST - OK
No errors were detected.
ET RETESTS: 0
The "ET RETEST" counter is designed to catch transient or non-fatal errors that may occur randomly in memory. In this case no transient error was found. This is a comparison tool that can be use by advanced users to compare between two or more modules. Please see Application Note 33 for further details.
FINAL SPEED: 1066MHz
FINAL TEST OK

TIME: 02:01.6
Shows that the DDR3 module passed the Final Test at 1066MHz and completed the test in 2 minute and 01.6 seconds from the start of the Extensive Test. The Final Test during Extensive Test is very similar to the Basic Test. It incorporates the same two array tests but at this stage, the module has been heated up during the Extensive Test.

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