RAMCHECK Generic Handler Interface

INN-8668-APN11
--Revised 9-23-2008

Note: The RAMCHECK was superseded by the RAMCHECK LX. Please refer to this application note regarding the RAMCHECK LX Handler Interface.

This document illustrates the protocol and wiring connections of the RAMCHECK/SIMCHECK HANDLER INTERFACE. Our various Handler Interface packages have been designed to accommodate the INNOVENTIONS brand handlers. While the following drawings illustrate the SIMCHECK II, they are applicable to the newer RAMCHECK tester.

Customers may use the following information if they are trying to interface our package to a Handler other than the INN-818 or the INN-828 INNOVENTIONS Handlers. We offer the INN-8668-HPAL generic RAMCHECK Handler interface kit that helps you interface RAMCHECK to your own Handler.

OVERVIEW OF RAMCHECK HANDLER INTERFACE

The following drawing illustrates how RAMCHECK/SIMCHECK II is interfaced to the Handler:

There are two main systems through which the Handler is interfaced to RAMCHECK/SIMCHECK II: the Test Site Interface and the Test Control Interface.

The Test Site Interface is a short connector which connects the RAMCHECK test socket to the Handler contactor assembly. The Handler contactor assembly automatically contacts the tested memory device, and is therefore an extension of the RAMCHECK test socket.

IMPORTANT NOTE: Customers interfacing RAMCHECK to another Handler must resolve the Test Site Interface issue in accordance with the specific Handler. The Test Site Interface is not included with the INN-8668-HPAL generic RAMCHECK Handler interface kit. Make sure that the Test Site Interface you build for your Handler insures short connections to the relevant RAMCHECK test socket.

The Test Control Interface provides command signals between RAMCHECK and the Handler. These include the test start signal (from the Handler to RAMCHECK) and the test results Sort1 (GO), Sort2 (NO GO), and the Motor Control signals (from RAMCHECK to the Handler). The INN-8668-HPAL generic RAMCHECK Handler interface kit is the basis for your Test Control Interface.

BLOCK DIAGRAM OF RAMCHECK/SIMCHECK HANDLER INTERFACE

The following drawing illustrates the block diagram of RAMCHECK/SIMCHECK II interface to the Handler:

As mentioned above, when interfacing RAMCHECK to your special Handler, you must provide the test site connector yourself.

The INN-8668-HPAL generic RAMCHECK Handler interface kit includes a PAL chip that must be installed in RAMCHECK's lower board and two cables to connect the RAMCHECK 16-pin expansion slot and a typical 15-pin D-SUB Handler's control connector. Once you verify the wiring diagram of your Handler (using the following information), you should connect the ends of the 16-pin and 15-pin cables of the INN-8668-HPAL kit to create your "customized" Handler control cable.

Many handlers use a 15-pin D-SUB connect to control the Handler. Typically, the INNOVENTIONS' older Handler INN-818 and INN-828 use a 15-pin D-SUB control connector with the following pin-out:

You must verify that your Handler use a similar connectors, and identify the specific connections.

All the control signals are TTL compatible.

• Test Start - Active Low, from Handler to RAMCHECK. Commands RAMCHECK to start the test. Remains active as long as a module is in the Handler test site.
• Sort 1 (Pass) - Active Low, from RAMCHECK to Handler. Commands the Handler to convey the tested module into the Pass bin.
• Sort 2 (Fail) - Active Low, from RAMCHECK to Handler. Commands the Handler to convey the tested module into the Fail bin.
• Motor Control - Active Low for INN-818 Handler, Active High for INN-828 Handler. From RAMCHECK to Handler. Activates or stops the Handler's conveyor motor.

INTERFACE PROTOCOL

TIMING REQUIREMENTS:

• T1- TEST START SIGNAL - RAMCHECK starts the test upon transition to low. Signal remains low during the test, until the module leaves the test site.
• T2- TEST BY RAMCHECK (CAN BE CONFIGURED BY TEST-FLOW SETUP) RAMCHECK generates SORT1 or SORT2 after the test so that the Handler resets the TEST START SIGNAL back to a high level.
• T3- SORT 1 (Pass) or SORT 2 (Fail) - Currently 100mS for Pass signal, 500mS for Fail signal. Can be customized to customer's specifications.
• T4- TEST BY RAMCHECK, WITH BAD DUT (Device Under Test), >=T2 DEPENDING ON TEST ALGORITHM.
• T5- Delay between the end of one test result and the start of the next test. MINIMUM 300 mS.

You must install the RAMCHECK Handler PAL Chip (as supplied in the INN-8668-HPAL) into the empty socket U18 on the RAMCHECK lower ("Processor") board. The pin-1 marker on the chip should face upward. Warning: Inserting the PAL chip in reverse will immediately destroy the chip.

RAMCHECK control signals for the Handler appears in the 16-pin IDC connector (on the right side of RAMCHECK), in accordance with the following table:

Once you have installed the PAL chip, you should enable the Handler operation by reaching RAMCHECK Handler menu: F2, F5, F1, F5, F5 and selecting F1 for Handler.

CONTACTING OUR TECH SUPPORT DEPT.

For more information, please call us at (281) 879-6226 M-F 9:00-5:00 Central Time, or send your E-mail to support@innoventions.com, or fax your message to (281) 879-6415. Please remember to include your phone and e-mail.